Approaches for Synthesis Conjectures in an SMT Solver

This report describes several approaches for handling synthesis conjectures within an Satisfiability Modulo Theories (SMT) solver. We describe approaches that primarily focus on determining the unsatisfiability of the negated form of synthesis conjectures using new techniques for quantifier instantiation. 1 Synthesis in an SMT solver A synthesis conjecture states there exists a function f for which some universal property P holds. In other words, a conjecture of this form can be stated as: